Automated, goal-driven design optimization.

FWS performance / capacity improvements.

New rules: Tiebarlocation, Component Net Topology.

Improved support for vendor-specific rules.

The latest VX.2.11 release of HyperLynx delivers many improvements and additions to the existing products. To learn more about HyperLynx DDRx, visit.HyperLynx is a complete family of products for high-speed systems design and verification which consists of HyperLynx SI ( Signal Integrity), HyperLynx PI ( Power Integrity), HyperLynx Advanced Solvers, HyperLynx DRC (Design Rule Check) product lines. Pre-route analysis to drive design restraints Post-route analysis / full interface level verification Benefits include:Īutomated workflow using wizards to guide through process HyperLynx DDRx provides powerful integrated signal integrity, crosstalk, and timing analysis that significantly reduces design and debug cycles for PCBs with DDR memory. Powerful, automated HyperLynx DDRx simulation With HyperLynx DDRx, you can fast track design decisions, improve engineering efficiency, and accelerate time to market.

HyperLynx streamlines DDRx design by dramatically reducing simulation setup time while providing accurate detailed results that include the effects of lossy transmission lines, reflections, impedance changes, vias, ISI, crosstalk, via-tovia coupling, SSN, and timing delays.

Traditional signal integrity batch-mode tools just aren’t up to the task. Complete validation of DDRx interfaces requires hundreds of signal integrity simulations and thousands of detailed measurements, followed by a comprehensive analysis of all signal quality requirements and signal/group timing relationships. DDR interfaces are some of the most complicated parallel interfaces in use today.

Hyperlynx vx